Siemens Digital Industries Software is a global leader in Electronic Design Automation (EDA) software, hardware, and design solutions. We partner with the world's leading producers of semiconductor microelectronic circuits and systems, enabling them to design and produce cutting-edge electronic products faster and more efficiently.
We are expanding our HAV portfolio to develop next-generation high-speed interconnect solutions. We are looking for a highly talented and driven Senior Staff Pre-Silicon Validation/Verification Lead to drive system-level validation across emulation and FPGA prototyping platforms.
This role focuses on leading system-level validation for interconnect solutions such as PCIe, CXL, NVMe, and UCIe across emulation and FPGA prototyping environments. You will define and execute robust verification strategies, ensuring high-quality delivery at both protocol and system levels. The position requires a strong hands-on technical foundation combined with leadership capabilities.
Responsibilities:
* Lead verification and validation activities for high-speed interconnect protocols (PCIe, CXL, NVMe, UCIe).
* Define and drive end-to-end pre-silicon verification strategies across simulation, emulation, and FPGA prototyping.
* Build and scale verification environments, integrating SystemC/UVM transactors, RTL monitors, BFMs, and full software stacks for HW/SW co-verification.
* Drive system-level validation, including performance, interoperability, and scalability analysis (latency, bandwidth, coherency, bottlenecks).
* Own regression strategy, including test planning, coverage tracking, and failure triage to ensure release quality.
* Develop and maintain scalable CI/CD pipelines and validation infrastructure for efficient execution.
* Ensure QA readiness through structured validation flows, coverage closure, and alignment with customer use cases.
* Lead deep debugging and root-cause analysis across RTL, protocol, and system-level issues.
* Collaborate with cross-functional teams (R&D, PM, PE, AE) to ensure alignment and timely delivery.
* Mentor engineers, review designs and test plans, and drive high-quality verification sign-off.
Required experience/skills
* Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field.
* +8 years of experience in system-level testing and verification.
* Strong understanding of interconnect protocols (PCIe, CXL, NVMe, AXI, UCIe).
* Hands-on experience with emulation platforms (e.g., Veloce, Palladium, ZeBu) or FPGA prototyping.
* Expertise in SystemVerilog, SystemC, and HW/SW co-verification methodologies.
* Proficiency in C/C++, with experience in bare-metal testing and validation with Linux drivers or firmware.
* Solid understanding of CPU architecture, memory hierarchy, and concepts such as IOMMU, coherency, and virtualization.
* Strong debugging skills across RTL, protocol, and system-level interactions.
* Experience building scalable validation infrastructure, including CI/CD pipelines, regression, and automation (Python, Bash).
* Proven ability to define and execute verification strategies and lead technical initiatives.
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