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ASIC DESIGN VERIFICATION INTERN - STRATEGIC STUDENT PROGRAM POLAND - 460282
Warsaw, POLSiemens Digital Industries Software is driving transformation to enable a digital enterprise where engineering, manufacturing and electronics design meet tomorrow. Our solutions help companies of all sizes create and leverage digital twins that provide organizations with new insights, opportunities and levels of automation to drive innovation.
ASIC Design Verification Intern - Strategic Student Program
Strategic Student Program, Poland 2025
Check the video: SIEMENS DISW Electronic Design Automation
Based: Warsaw , Poland. Hybrid / Working on-location. Full-time 3 months (1st of July to 30th of September). Possible extension 3 months (1st of October to 31st of December on part-time or full-time )
Siemens Digital Industries Software (DI SW) helps organizations of all sizes digitally transform using software, hardware and services from the Siemens Xcelerator business platform. Siemens' software and the comprehensive digital twin enable companies to optimize their design, engineering and manufacturing processes to turn today's ideas into the sustainable products of the future. From chips to entire systems, from product to process, across all industries, Siemens Digital Industries Software accelerates transformation. We at Siemens EDA develop sophisticated software tools that span the full breadth of semiconductor and electrical systems solutions, including integrated circuit design and verification, PCB design and manufacturing solutions, cable harness tools, and embedded software.
Start your career with the Strategic Student Program (SSP).
The SSP is our formal internship program at SIEMENS Software globally. You will be mentored by experts and work directly with customers to create direct business impact and again invaluable professional experience. At Siemens, SSP interns get access to an international student network and community, career development opportunities with professional growth pathways, comprehensive practical training throughout the program, access to the Siemens Learning Hub and other training materials, and the opportunity to work on exciting projects within a global, diverse team.
What you’ll be doing as an intern in one of the Tessent Research and Development teams
Tessent Embedded Analytics, part of Siemens EDA, is a pioneering developer of analytics and monitoring technology at the heart of the systems-on-chip (SoCs) that power today’s electronic products. Our embedded analytics technology allows product designers to add sophisticated cybersecurity, functional safety and performance tuning features; and it helps resolve critical issues such as increasing system complexity and ever- decreasing time-to-market. We are proud of our technology and selling globally to many of the most respected and most exciting technology companies in the world.
Are you experienced in silicon IP and digital design using RTL languages? Do you have a passion for verification and a track record of verifying complex silicon IP? If so, Tessent Embedded Analytics wants to hear from you! We are looking for highly capable and motivated Digital Design or Verification Engineers to join our growing team. If you are excited by the idea of learning, growing, and succeeding in a dynamic environment — and want to help shape the future of our ground-breaking silicon IP — then this could be the opportunity for you.
Your Learning in Practice
What You’ll Be Doing
- Designing, developing, modifying, and implementing innovative silicon IP blocks, always aiming to exceed customer expectations
- Taking part in the evolution and continuous improvement of our development processes
- Ensuring the overall quality and robustness of the released products
All About You
What you’ll bring
- An ability to take on challenging design problems, making appropriate trade-offs of power, performance and area
- A high competence at digital design using RTL languages, preferably Verilog
- Experience using EDA tools including Questa, VCS or Xcelium
- Solid organisational and communication skills
Nice if you have
- Experience with synthesis and timing closure
- Some experience with scripting, preferably Python
- Knowledge of multi-clock design and clock domain crossing techniques
SSP Poland 2025, conditions & eligibility
Siemens Strategic Student Program (SSP) in Poland for a Summer Internship from 01 July to 30 September 2025, with the possibility of extension for the full academic year (01 October 2025 to 30 June 2026). You may also have the opportunity to write your bachelor’s or master’s thesis in cooperation with Siemens EDA.
Internships are paid – both during the summer and the extended periods.
Eligibility
- You must be currently enrolled or a recent graduate.
- International students must have a valid visa and/or work permit. Please note that Siemens does not provide support for visa or permit processes.