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R&D SOFTWARE ENGINEER (C++/DS/ALGORITHM) - 451310
Noida, IndiaSiemens Digital Industries Software is driving transformation to enable a digital enterprise where engineering, manufacturing and electronics design meet tomorrow. Our solutions help companies of all sizes create and leverage digital twins that provide organizations with new insights, opportunities and levels of automation to drive innovation.
Join Our Aprisa Team!
Looking for Siemens EDA ambassadors
Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design.
We make real what matters.
This is your role.
At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We're excited to be working on the next-generation RTL-to-GDSII solution, and we want YOU to be a part of this innovative journey!
This is the Role
- Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis.
- Guide and lead others toward successful project completion by innovating and implementing powerful solutions.
- Collaborate with a hardworking team of experts.
Must-Have Requirements
- B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college with 5-8 years of experience in software development.
- Validated understanding of C/C++, algorithms, and data structures.
- Demonstrate excellent problem-solving and analytical skills.
- Lead and encourage the team with your expertise.
Great to Have Experience in:
You will have the opportunity to develop RTL synthesis tools and work with System Verilog, VHDL, DFT, formal verification, and Dynamic Power.
Additionally, you will design C or RTL IPs and optimize RTL & gate level logic, area, timing, and power.
Your experience in developing parallel algorithms and job distribution strategies will be highly valued, as well as your proficiency in using scripting languages like Python and Tcl.
We are Siemens
A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow!
We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home.
We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.
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