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PRINCIPAL ENGINEER - VTL DESIGN AND VERIFICATION ENGINEER - 526776
Noida, IndiaYou’ll need a referral from an employee to apply for this job.
Siemens Digital Industries Software is driving transformation to enable a digital enterprise where engineering, manufacturing and electronics design meet tomorrow. Our solutions help companies of all sizes create and leverage digital twins that provide organizations with new insights, opportunities and levels of automation to drive innovation.
About Group
The Veloce Transactor Group is part of the Mentor Emulation Division R&D located in Noida. The group is responsible for developing transactors (RTL-based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automotive, etc. At present, the Veloce Transactor Library supports more than 25 protocol solutions and is actively expanding further.
Position Overview
We are looking for a passionate Design and Verification Engineer with 1 to 8 years of experience to join our R&D team in Noida. In this role, you will be responsible for developing cutting-edge transactor (xVIP) solutions for advanced interconnect technologies such as CCIX and PCIe, working at the forefront of hardware acceleration and emulation.
Roles & Responsibilities
- Develop transactor (xVIP) solutions for CCIX or PCIe-based interconnect technologies.
- Understand complex standard specifications and define robust architecture and micro-architecture for the design.
- Write clean, synthesizable RTL designs using Verilog and SystemVerilog targeted for FPGAs, ASICs, and IPs.
- Create comprehensive verification test plans, build test environments, develop testcases, utilize VIPs, and debug defects effectively through structured verification processes.
- Engage directly with customers to provide technical deployment support and R&D assistance.
Primary Technical Skills
- Hands-on experience with industry standard protocols (e.g., PCIe, USB, Ethernet, AMBA) in either Design or Verification.
- Good understanding of IP verification methodologies, procedures, and best practices.
- Proficiency in Verilog, SystemVerilog, or SystemC.
- Proven experience in RTL development for FPGAs, ASICs, or IPs.
- Experience with verification techniques such as simulation, emulation, acceleration, or formal verification.
- Familiarity with scripting languages such as Perl or Python.
- Exposure to object-oriented programming using languages such as C++ is an advantage.
Education & Experience
- Work Experience: 12+ years.
- Education: Bachelor's (BE/BTech) or Master's (ME/MTech/MS) degree in Electrical/Electronics Engineering or a related technical discipline from a premier engineering institute.
Why Us
At Siemens Software, flexibility is how we work—hybrid by default, built on trust and autonomy, with state-of-the-art R&D facilities in Noida. Together, over 377,000 people across more than 200 countries build technology that shapes the real world. You'll grow through high-impact projects, strong technical peers, and global collaboration, backed by the scale and benefits of an industrial software leader. We're committed to equality and inclusion, and we hire based on merit, skills, and impact. Bring your curiosity and creativity and help us shape tomorrow!
Our Commitment to Equity and Inclusion in our Diverse Global Workforce
We value your unique identity and perspective. We are fully committed to providing equitable opportunities and building a workplace that reflects the diversity of society, while ensuring that we attract the best talent based on qualifications, skills, and experiences. We welcome you to bring your authentic self and transform the everyday with us.
Siemens Software. Transform the Everyday
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