VTL Design and Verification Engineer - 266928

Noida, India

About Siemens Digital Industries Software

Siemens Digital Industries Software is driving transformation to enable a digital enterprise where engineering, manufacturing and electronics design meet tomorrow. Our solutions help companies of all sizes create and leverage digital twins that provide organizations with new insights, opportunities and levels of automation to drive innovation.

VTL Design and Verification Engineer - 266928

Veloce Transactors (Accelerated Verification IPs) Veloce Transactor Group is part of Mentor Emulation Division R&D located in Noida. Group is responsible for developing transactors (RTL & SW based IPs/VIPs) for various protocol solutions in Networking, Display, Storage, Mobile, Automobile etc. At present Veloce Transactor Library supports more than 25 protocol solution and expanding further.

Position: Protocol BFM Softmodel Design and Verification Engineer

Looking for Semiconductor and embedded professionals with C/C++ expertise in modelling IP blocks, SOC and/or protocols.

  • Proficient in C/C++ coding
  • Experience of software systems modelling and simulation
  • Experience in developing TLM Models with reasonable complexity. Familiar with different TLM methodology and modelling abstractions
  • Proficient in using one or more scripting languages like Perl, Python, TCL
  • Applicant should have good communication skills

Good to have :-

  • Knowledge of HDL (Verilog, VHDL), or verification languages (SV, e) is desirable
  • Working knowledge of HDL simulators
  • Working knowledge of FPGA/emulation systems

Organization: Digital Industries

Company: Mentor Graphics (India) Private Limited

Experience Level: Mid-level Professional. Experience – 3-7 years

Job Type: Full-time



Organization: Digital Industries

Company: Mentor Graphics (India) Private Limited

Experience Level: Mid-level Professional

Job Type: Full-time