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ASSOCIATE PRINCIPAL PRODUCT ENGINEER(P&R) - 526082
Taipei City, TaiwanYou’ll need a referral from an employee to apply for this job.
Siemens Digital Industries Software is driving transformation to enable a digital enterprise where engineering, manufacturing and electronics design meet tomorrow. Our solutions help companies of all sizes create and leverage digital twins that provide organizations with new insights, opportunities and levels of automation to drive innovation.
Siemens' APRISA tool is a full-featured, competitive SP&R solution.
We are seeking a highly motivated technologist with the capability and desire to make a significant contribution to the development and deployment of our tool.
This Product Engineer position located at Siemens EDA/Taiwan plays a significant role in the success of Siemens' customers as they craft the state-of-the-art IC products.
This person will be -
Interfaces with top-level customer engineers and managers to develop or enhance complex computer-aided engineering design or manufacturing processes for a customer.
Enable Siemens EDA P&R solutions adoption and deployment into customers production flows
Provide best-in-class support to ensure customers success and broader use of Siemens EDA P&R solutions.
Collaborate with foundries on advanced process nodes to achieve technology enablement.
Work with internal R&D to enhance product (APRISA) for advanced technology support Cogently communicates software problems to product development.
The responsibilities include, but are not limited to, the following:
Compete benchmark and demonstrate product core technology to customer.
Act as a technical consult between customer and R&Ds to do technical support.
Assist efficiently with further product deployment of the core technology.
Collaborate between foundries and R&D to pass advanced process node certification.
You are able to be the product expert to drive the success of Siemens EDA physical design flow.
Job Qualifications:
The successful candidate will possess the following combination of education and experience:
Master with 3-5 years working experience or Bachelor with 7+ years' experience in IC design.
Experiences should include ASIC/SoC back-end design (Place & Route), knowledge of designing in 28nm or below process technologies is preferred.
Understanding of full APR flow including timing, congestion analysis, low-power methodology and physical verification.
Solid knowledge of Siemens EDA P&R tools, or competitive EDA tools. Advanced nodes or Synthesis experience is a plus
Good communication in English and Chinese, good confidence and good self-motivation