Associate Engineer - Early Careers Program C C++ Verilog SystemVerilog VHDL - 304893

Wilsonville, OR

About Siemens Digital Industries Software

Siemens Digital Industries Software is driving transformation to enable a digital enterprise where engineering, manufacturing and electronics design meet tomorrow. Our solutions help companies of all sizes create and leverage digital twins that provide organizations with new insights, opportunities and levels of automation to drive innovation.

Associate Engineer - Early Careers Program C C++ Verilog SystemVerilog VHDL - 304893

In this position, you will be involved in a structured Associate Rotation Engineer Training Program. This is an early careers fast-track paid training program that challenges you to develop the expertise needed to solve difficult technical problems.


Associate Rotation Engineers are members of a team of highly motivated individuals working with customers designing the most complex hardware and software systems in the world and whose applications span the electronics industry. This training program will give you unique insight into our technical marketing, product support, and sales organizations. Upon successful completion of this12-month training program, you will be eligible to advance into one of these organizations. Post program opportunities include Field Application Engineer, Corporate Applications Engineer and Technical Marketing Engineer positions.

Skills: C, C++, Verilog, SystemVerilog, VHDL

Associate positions require excellent interpersonal and written communication skills; self-motivated and results oriented with strong problem solving skills. Some travel may be required. Applicants must be willing and able to relocate anywhere within the USA upon completion of training.

Target start date is Spring/Summer, 2022

Bachelor or Masters degree in Electrical or Computer Engineering. Course work project experience, and programming skills in C/C++, Tcl/TK, PERL. Good understanding of object oriented concepts as applied to a Verification Environment. Coursework/Experience with HDL-based, register-transfer-level (RTL), digital logic design, verification languages, and functional verification methodology, for ASICs and/or FPGAs. This experience/coursework should include some or all of the following: test bench architecture, design and implementation using UVM/OVM/AVM verification methodology, VHDL and/or Verilog HDL simulation, SystemVerilog, Specman/e, Vera and/or PSL and Assertion-Based Verification techniques.


Where permitted by applicable law, Siemens may require employees to be fully vaccinated against COVID-19 based on job requirements, and in accordance with an accommodation based on legally protected reasons.

At Siemens we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow’s reality. Find out more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds


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Organization: Digital Industries

Company: Siemens Industry Software Inc.

Experience Level: Recent College Graduate

Job Type: Full-time



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